Single event upset induced multi-block error and its mitigation strategy for SRAM-based FPGA

查看全文 作　　者：XING KeFei YANG JianWei ZHANG ChuangSheng HE [1]Wei

机构地区：[1]Department of Instrument Science and Technology, School of Mechatronics and Automation, National University of Defense Technology, Changsha 410073, China

出　　处：《Science China(Technological Sciences)》索引2011年第54卷第10期,共8页

基　　金：supported by the National High Technology Research and Development Program of China ('863' Program) (Grant No. 2006SQ710375);the Civil Aerospace Technologies Advanced Research Pro-gram of China (Grant No. C1320061301);Ministries and Commissions’Advanced Research Found of China (Grant No. 9140A20070209KG0160) 摘　　要：According to the SRAM-based FPGA's single event effect problem in space application,single event upset induced multi-block error(SEU-MBE) phenomenon and its mitigation strategy are studied in the paper.After analyzing the place and route result,the paper points out that the essence of SEU-MBE is that some important modules exceed the safe internal distance.Two approaches,area constraint method(ACM) and incremental route algorithm(IRA),are proposed,which can reduce the error rate by manipulating programmable switch matrix and interconnection points within FPGA route resource.Fault injection experiments indicate that error detection rate is above 98.6% for both strategies,and FPGA resources increment and performance penalty are around 10%. 关键词：单粒子翻转 FPGA SRAM 诱导空间应用安全距离路由算法故障注入

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Single event upset induced multi-block error and its mitigation strategy for SRAM-based FPGA

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