Single event upset sensitivity of 45 nm FDSOI and SOI FinFET SRAM

查看全文 作　　者：TANG [1]Du;LI [1]YongHong;ZHANG [2]GuoHe;HE [1]ChaoHui;FAN [1]YunYun 机构地区：[1]School of Energy and Power Engineering,Xi'an Jiaotong University;[2]School of Electronic and Information Engineering,Xi'an Jiaotong University 出　　处：《Chinese Science Bulletin》索引2013年第58卷第7期,共6页 基　　金：supported by the National Natural Science Foundation of China (Grant No. 11175138);the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 20100201110018);the Key Program of the National Natural Science Foundation of China (Grant No. 11235008) 摘　　要：In this work single event upset(SEU) sensitivity of 45 nm fully depleted silicon-on-insulator(FDSOI) static random access memory(SRAM) cell and that of SOI fin-shaped field-effect-transistor(FinFET) SRAM cell have been investigated by 3D TCAD simulations.The critical charges and SEU threshold linear energy transfer(LET) value of the two SRAM cells are consistent due to similar gate capacitance.The low electrical field and the high recombination rate account for the non-sensitivity to SEU in heavily doped drain region.Compared with FDSOI SRAM,SOI FinFET SRAM cell exhibits lower SEU sensitivity at the center of the gate.The smaller sensitive area in SOI FinFET SRAM cell may result in a smaller SEU saturation cross section than that of SOI FinFET SRAM. 关 键 词：SRAM单元 FINFET 单粒子翻转 SOI 敏感性 静态随机存取存储器 纳米 场效应晶体管