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31篇 您的检索式：作者名="Maneatis J G"

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	题名	作者	年代	出处	被引量
1	Precise Delay Generation Using Coupled Oscillators显示文摘	Maneatis J G Horowitz M A	1993	IEEE Journal of Solid-State Circuits1993，28，12：	1
2	Lo、Vitter process-independent DLLand PLL based on self-biased technique显示文摘	Maneatis J G	1996	IEEE J SolSta Circ1996，31，11：	1
3	Lovejitter process independent DLL and PLL based on self-biased techniques 显示文摘	MANEATIS J G	1996	IEEE J Sol Sta Circ1996，31，11：	1
4	Low-jitter process-independent DLL and PLL based on self-biased technique显示文摘	MANEATIS J G	1996	IEEE J Sol Sta Circ1996，31，11：	1
5	Low-jitter process-independent DLL and PLL based on self-biased techniques 显示文摘	Maneatis J G	1996	IEEE JSSC1996，31，11：	1
6	Low-jitter process-independent DLL and PLL based on self-biased techniques显示文摘	MANEATIS J G	2002	IEEE Journal of Solid-State Circuits2002，31，11：	1
7	Low-Jitter Process-independent DLL and PLL Based on Self-biased Techniques显示文摘	Maneatis J G	1996	IEEE Journal of Solid-state Circuits1996，31，11：	1
8	Precise delay generation using coupled oscillators显示文摘	MANEATIS J G HOROWITZ M A	1993	IEEE Journal of Solid-State Circuits1993，28，12：	1
9	Low-jitter process-independent DLL and PLL based on self-biased techniques显示文摘	MANEATIS J G	1996	IEEE J Sol Sta Circ1996，31，11：	1
10	Low jitter process-independeat DLL and PLL based on self-biased techniques显示文摘		1996	IEEE Journal of Solid-State Circuits1996，31，11：	1
11	Low jitter process independent DLL and PLL based on self biased techniques显示文摘	Maneatis J G	1996	IEEE J Solid State Circuits1996，31，17：	1
12	Low-Jitter Process-Independent DLL and PLL Based on Self-biased Techniques显示文摘	Maneatis J G	1996	IEEE Journal of Solid-State Circuits1996，31，11：	1
13	Low-jitter process-independent DLL and PLL based on self-biased techniques 显示文摘	MANEATIS J G	1996	IEEE Journal of Solid- State Circuits1996，31，11：	1
14	Low-jitter process-independent DLL and PLL based on self-biased techniques 显示文摘	Maneatis J G	1996	IEEE J Solid-State Circuits1996，31，11：	1
15	Self-biased high-band- width low-jitter 1-to-4096 multiplier clock generator PLL 显示文摘	Maneatis J G Kim J Mcclatchie I	2003	IEEE J Solid- State Circuits2003，38，11：	1
16	Low-jitter process-independent DLL and PLL based on self-biased techniques 显示文摘	Maneatis J G	1996	IEEE J Solid-State Circuit1996，31，11：	1
17	Low-jitter process-independent DLL and PLL based on self-biased techniques显示文摘	MANEATIS J G	1996	IEEE Journal of Solid-State Circuits1996，31，11：	1
18	Low--jitter process--independent DLL and PLL based on self-biased techniques显示文摘	Maneatis J G	1996	1EEE Journal of Solid-State Circuits1996，31，11：	1
19	Low-jitter process-independent DLL and PLL based on self-biased techniques 显示文摘	MANEATIS J G	1996	IEEE J Sol Sta Cir1996，31，11：	1
20	Self--biased high--bandwidth low--jitter 1 --to--4096 multiplier clock generator PLL显示文摘	Maneatis J G	2003	IEEE Journal of Solid-State Circuits2003，38，11：	1

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